About Me
I am passionate about unraveling and mastering the complexities of diverse domains. My approach is holistic, integrating various disciplines to craft innovative and comprehensive solutions.
Currently, I am a Principal LLM Performance Architect at Volantis Semiconductor, where I work at the intersection of LLM performance, systems, and next-generation hardware to build ambitious new infrastructure for frontier AI. Previously, I was part of the architecture team at d-Matrix, focusing on distributed LLM inference and memory-centric accelerator design. Learn more about me [here.]
Last Entries
- 07.2026 - It Was Never Hard, It Was Just Expensive: Kimi K3 and the Myth of the Frontier Lab
- 07.2026 - The Beginning of an End: 12 Years from the Hybrid Memory Cube to 3D-DRAM
- 06.2024 - Taping Out ASICs: My First Hardware-Design Related Entry
Selected Work
Invited Talk
On-Device Computing: Rain AI’s Mission for Energy-Efficient AI Hardware; UCI IAP Workshop, 2024.
PhD Research
Guidelines navigating hardware-software trade-offs for next-gen edge devices; 2014–2021.
Undergrad Research Demos
Working closely with 40+ talented undergraduates, resulting in several publications and interactive demos.